
AVK-448 | Digital Signal Processing Asic Design Engineer
- Argentina
- Permanente
- Tiempo completo
- Engineer best signal processing solutions and translate them to digital architectures.
- Provide C++ high-level model and HDL (Verilog) source code.
- Run functional verification regressions.
- Write thorough documentation.
- Give effective engineering presentations.LI-MFBJWhat We're Looking ForTo be successful in your role, you must
- Have a Bachelor’s Degree in Electronic Engineering, Computer Science, or Telecommunications.
- Understand C, C++, Verilog, and Python programming.
- Have english communication skills.Additional Compensation and Benefit ElementsWith competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit ourCareerspage.All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
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